Industrial Consultancy & Sponsored Research (IC&SR) , IIT Madras

Technology Category/ Market

Category- Chemical Mechanical Planarization Process

Applications – Used for the polishing of silicon dioxide and silicon nitride wafers during the production of integrated circuits (ICs).

Industry – Semiconductor Manufacturing.

Market- Global chemical mechanical planarization market size is expected at $5.82 Bn by 2027 at a growth rate of 7.9%.

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Problem Statement

  • To achieve planarization and polishing of wafer surfaces, Chemical Mechanical Polishing (CMP) is an essential technique in semiconductor production.
  • Traditional CMP processes using abrasive slurries have limitations, including impurities, defects, and difficulty controlling material removal rates.
  • The development of next-generation nanoparticle abrasives holds promise for improving CMP performance, reducing defects, and achieving greater control over material removal.
  • Researchers are exploring using ceria nanoparticles and other advanced abrasives to enhance CMP processes and meet the demands of advanced semiconductor technology.

Technology

  • The CMP method involves using a fixed abrasive pad loaded with ceria, which contains less than 1 wt% lanthanum along with additives like L-proline.
  • The ceria abrasive can be either nano particles or micro particles, providing flexibility in particle size selection based on process requirements.
  • The ceria is a combination of cerium and oxygen, while the lanthanum present in ceria is in the form of lanthanum oxide.
  • The polishing slurry used in the process has a pH value of 7 and is designed to non-selectively enhance the polish rate of silicon dioxide and silicon nitride.
  • This CMP method offers a controlled and efficient approach for planarization of silicon wafers, especially in semiconductor manufacturing, with the potential for improved performance and reduced defects.

Key Features/ Value Proposition

  • Enhanced CMP Performance.
  • Nano or micron size abrasive ceria particles can be used.
  • Applicable with most of the amino acids as additives.
  • Non-Selective Polishing of both oxide and nitride wafers.
  • Cost-Efficiency and Productivity.

Questions about this Technology?

Contact for Licensing

sm-marketing@imail.iitm.ac.in
ipoffice2@iitm.ac.in

Research Lab

Prof. Ramanathan S

Department of Chemical Engineering

Intellectual Property

  • IITM IDF Ref. 1086
  • IN 426681 – Patent Granted

Technology Readiness Level

TRL – 3 

Technology concept formulated.

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