Industrial Consultancy & Sponsored Research (IC&SR) , IIT Madras

Method for Determining Distortion Contribution of Individual Elements in an Analog Circuit

Categories for this Invention

Category – Electrical Engineering, Circuit Diagnostics

Applications -Distortion Analysis and Optimization in Analog Circuits

Industry – Electronics Manufacturing, Semiconductor, Circuit Design and Testing

Market – Electronic Design Automation Market was valued at USD 12.9 billion in 2022 and is estimated to register a CAGR of over 10% between 2023 and 2032.

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Problem Statement

  • Traditional methods for diagnosing distortion in analog circuits are inefficient, particularly with nonlinear elements, lacking applicability in complex configurations.
  • There is a need for a systematic approach to identify distortion contributions of individual elements without requiring detailed models, accommodating variations, and extending applicability beyond sinusoidal inputs.

Technology

Simulation with SPICE-like Model:

  • Utilizes SPICE-like simulation to analyze output distortion of analog circuits.

Replacement of Elements:

  • Substitutes circuit elements with identical operating points but different nonlinearities to identify distortion contributions.

Iterative Nonlinear Term Identification:

  • Iteratively varies scaling factors of nonlinear terms to identify distortion contributions.

Set of Linear Equations:

  • Derives a set of linear equations from simulation results to represent distortion contributions.

Efficient Distortion Analysis:

  • Provides a systematic and efficient method to determine distortion contributions without requiring detailed device models or closed-form descriptions.

Key Features / Value Proposition

  • Systematically identifies distortion contributions of individual circuit elements or blocks.
  • Offers efficient simulation-based analysis without the need for detailed device models, enabling optimization and robustness evaluation of distortion cancellation schemes.
  • Streamlines circuit diagnostics by pinpointing distortion sources in complex analog circuits.
  • Saves time and resources by offering an automated, simulation-driven approach to distortion analysis, enhancing design efficiency and performance optimization.

Questions about this Technology?

Contact For Licensing

sm-marketing@imail.iitm.ac.in
ipoffice2@iitm.ac.in

Research Lab

Prof. Nagendra Krishnapura

Department of Electrical Engineering

Intellectual Property

  • IITM IDF Ref. 1104
  • IN 375099 (Patent Granted)

Technology Readiness Level

TRL- 4

Technology Validated in lab

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