Industrial Consultancy & Sponsored Research (IC&SR) , IIT Madras
A Signal Strength Indicator Circuit
Categories for this Invention
Technology: Signal Strength Indicator Circuit;
Industry/Application: Signal Strength detectors, signal-strength detector; CMOS inverter;
Market: The global market is projected to reach at a CAGR of 32.58% during the period (2024-32).
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Problem Statement
- The problem statement discussed in the present invention is how to develop a topology where amplification and amplitude detection can be combined in a single block. .
- Hence, subject invention addresses the issue efficiently.
Technology
- Present patent discussed about a pseudo-differential amplifier chain.
- Said pseudo-differential amplifier chain comprises a complementary metal oxide semiconductor (CMOS) inverter pair as amplifier, configured to receive a differential signal.
- Further, it includes a voltage regulator unit connected to the pseudo-differential amplifier chain to provide a supply voltage Vs for biasing the pseudo-differential amplifier at a reference Direct current (DC) operating point.
- Moreover, the pseudo-differential amplifier chain includes a current mirror circuit connected with the pseudo-differential amplifier chain to receive a supply current from the pseudo-differential amplifier chain & generate a mirrored output current.
- The mirrored output current is used to determine strength of the differential signal.
Key Features / Value Proposition
- Integrates amplification & amplitude detection in a single unit. CMOS inverters can be more easily designed at low supply voltages than other types of amplifiers.
- Develops a signal-strength detector utilising low power.
- The signal-strength detector circuit occupies 0.08 mm2, consumes 1.2 mW from 1.5V and
- the noise floor is 0.2mV rms. (Refer Table1)
- Facilitates a compact signal-strength detector.
- More amenable to low supply voltage operation.
- A 65nm prototype of the
- signal-strength detector circuit has a 70.9dB dynamic range with ±1dB error.
Questions about this Technology?
Contact For Licensing
sm-marketing@imail.iitm.ac.in
ipoffice2@iitm.ac.in
Research Lab
Prof. Nagendra Krishnapura
Department of Electrical Engineering
Intellectual Property
IITM IDF Ref. 2529
Patent No. 545473
Technology Readiness Level
TRL – 4
Technology validated in lab scale.