Industrial Consultancy & Sponsored Research (IC&SR) , IIT Madras
CPLD- Based Active Gate Driver for Hard Switched and Soft Switched SIC Mosfet
Categories for this Invention
Power Electronics and Semiconductor Devices
Applications– Renewable Energy Systems, Electric Vehicles (EVs)
Industry – Power Electronics & Automotive
Market – Silicon Carbide Power Semiconductor Market size is estimated at USD 2 billion in 2024, and is expected to reach USD 6.7 billion by 2029, growing at a CAGR of 25.% during the 2024-2029.
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Problem Statement
- SiC MOSFETs exhibit faster switching speeds than Si IGBTs, leading to excessive overshoot and oscillation in device voltage and current during transients due to L-C network effects.
- There is a need to develop an active gate driver (AGD) to dynamically manage gate capacitance charging and discharging based on real-time device feedback, aiming to mitigate overshoot and oscillation effects during switching.
- Design an AGD system capable of achieving quasi-zero voltage switching (QZV) and quasi-zero current switching (QZC) under various load conditions, thereby minimizing switching losses and addressing EMI issues associated with SiC MOSFET operation.
Technology
Product Description:
- An active gate driver (AGD) is proposed, consisting of turn-on and turn-off mechanisms along with a complex programmable logic device (CPLD).
- The CPLD analyzes input signals from a comparator unit to generate a control signal voltage, facilitating selective switching of one or more transistors’ gate terminals.
Methodology:
- The AGD dynamically adjusts gate resistance during switching transients, enabling precise control over turn-on and turn-off processes.
- This involves configuring the CPLD to interpret signals from the comparator unit and outputting appropriate control voltages to manage transistor gating effectively.
Key Features / Value Proposition
Enhanced Efficiency:
- Reduction of voltage and current overshoots leads to decreased switching losses, thereby improving converter efficiency.
Oscillation Mitigation
- Persistent oscillations in voltage and current are arrested through precise control over parasitic inductance and device capacitance interactions.
EMI Reduction:
- Control over di/dt and dv/dt, alongside improved common mode noise reduction, enhances EMI performance in hard-switched converters.
Optimized Switching:
- Complete Quasi-Zero Voltage (QZV) and Quasi-Zero Current (QZC) achievement with controlled gate current injection minimizes switching losses.
Advanced Protection:
- Reduced blanking time for shoot-through protection ensures continuous device protection during switching intervals.
Fault Tolerance:
- Soft turn-off feature and gate voltage limitation safeguard device integrity under fault conditions, enhancing reliability across various load scenarios.
Questions about this Technology?
Contact For Licensing
sm-marketing@imail.iitm.ac.in
ipoffice2@iitm.ac.in
Research Lab
Prof. Kamalesh Hatua
Department of Electrical Engineering
Intellectual Property
- IITM IDF Ref. 1328
- IN 493424 – Patent Granted
Technology Readiness Level
TRL – 4
Technology validated in lab scale.